Q3_Datasheet_Brief_V1_10_图文

Q3 Datasheet Brief

Internet Multimedia Application Processor Sept. 30, 2015 Rev 1.10

Shanghai InfoTM Microelectronics Co., Ltd Copyright ? 2015 Shanghai InfoTM Microelectronics Co., Ltd. All Rights Reserved

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Internet Multimedia Application Processor (Q3) Datasheet Brief, Revision 1.10
Copyright ?2015 Shanghai InfoTM Microelectronics Co.,Ltd. All rights Reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior written consent of Shanghai InfoTM Microelectronics Co., Ltd. Shanghai InfoTM Microelectronics Co., Ltd. 16F, Bldg. 1, Sandhill Plaza, 2290 Zuchongzhi Rd. Zhangjiang Hi-Tech Park. Shanghai P.R.C Web: Tel: Fax: www.infotm.com +86-21-5027-7720 / 7721 +86-21-5027-7736

Revision History
Revision No
1.00 1.01 1.10

Description of Change
Initial Draft. Modify Document format Update Ballmap and Pinlist

Refer to
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Author(s)
Gary Shi James du James du

Date
2015-03-05 2015-09-20 2015-9-30

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Table of Contents
REVISION HISTORY........................................................................................................................................................................II LIST OF FIGURES.......................................................................................................................................................................... IV LIST OF TABLES..............................................................................................................................................................................V 1 INTRODUCTION.................................................................................................................................................................... 1 1.1 OVERVIEW....................................................................................................................................................................... 1 1.2 FEATURES........................................................................................................................................................................ 1 1.2.1 CPU.......................................................................................................................................................................... 1 1.2.2 Memory System....................................................................................................................................................... 1 1.2.3 Boot & Download System........................................................................................................................................ 1 1.2.4 Multimedia Acceleration......................................................................................................................................... 2 1.2.5 ISP (Image Signal Processing) Subsystem................................................................................................................ 3 1.2.6 Display Subsystem................................................................................................................................................... 3 1.2.7 Security Subsystem.................................................................................................................................................. 3 1.2.8 Connectivity............................................................................................................................................................. 4 1.2.9 GPIO......................................................................................................................................................................... 4 1.2.10 System Peripherals.............................................................................................................................................. 4 1.2.11 Package............................................................................................................................................................... 5 1.3 BLOCK DIAGRAM.............................................................................................................................................................. 5 2 PACKAGE INFORMATION..................................................................................................................................................... 1 2.1 2.2 2.3 2.4 2.5 3 DIMENSION..................................................................................................................................................................... 1 BALL MAP....................................................................................................................................................................... 2 PIN NUMBER ORDER......................................................................................................................................................... 6 Q3 POWER/GROUND IO DESCRIPTIONS.............................................................................................................................12 Q3 FUNCTION IO DESCRIPTIONS....................................................................................................................................... 14

ELECTRICAL SPECIFICATION................................................................................................................................................. 1 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 POWER ON SEQUENCE...................................................................................................................................................... 1 ABSOLUTE MAXIMUM RATINGS.......................................................................................................................................... 2 RECOMMENDED OPERATING CONDITIONS............................................................................................................................ 3 DC CHARACTERISTICS........................................................................................................................................................ 4 ELECTRICAL CHARACTERISTICS FOR DIGITAL IO...................................................................................................................... 4 ELECTRICAL CHARACTERISTICS FOR PLL................................................................................................................................ 5 ELECTRICAL CHARACTERISTICS FOR USB HOST&OTG PHY..................................................................................................... 5 ELECTRICAL CHARACTERISTICS FOR DRAM IO....................................................................................................................... 6

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List of Figures
FIGURE 1- 1: Q3 BLOCK DIAGRAM................................................................................................................................................5 FIGURE 2- 1: Q3 TFBGA446 PACKAGE DIMENSION.....................................................................................................................1 FIGURE 2- 2: Q3 TFBGA446 BALL MAPPING DIAGRAM (LEFT-TOP).......................................................................................... 2 FIGURE 2- 3: Q3 TFBGA446 BALL MAPPING DIAGRAM (RIGHT-TOP)........................................................................................ 3 FIGURE 2- 4: Q3 TFBGA446 BALL MAPPING DIAGRAM (LEFT-BOTTOM)...................................................................................4 FIGURE 2- 5: Q3 TFBGA446 BALL MAPPING DIAGRAM (RIGHT-BOTTOM).................................................................................5 FIGURE 3- 1: Q3 POWER ON SEQUENCE........................................................................................................................................ 1

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List of Tables
TABLE 2- 1: Q3 PIN NUMBER ORDER INFORMATION.................................................................................................................... 6 TABLE 2- 2: Q3 POWER/GROUND IO INFORMATION................................................................................................................... 12 TABLE 2- 3: Q3 IO DECRIPTIONS.................................................................................................................................................14 TABLE 3- 1: Q3 ABSOLUTE MAXIMUM RATINGS.......................................................................................................................... 2 TABLE 3- 2: Q3 RECOMMENDED OPERATING CONDITIONS...........................................................................................................3 TABLE 3- 3:Q3 DC CHARACTERISTICS.......................................................................................................................................... 4 TABLE 3- 4: Q3 ELECTRICAL CHARACTERISTICS FOR DIGITAL IO................................................................................................4 TABLE 3- 5: Q3 ELECTRICAL CHARACTERISTICS FOR PLL........................................................................................................... 5 TABLE 3- 6: Q3 ELECTRICAL CHARACTERISTICS FOR USB HOST&OTG PHY............................................................................ 5 TABLE 3- 7: Q3 ELECTRICAL CHARACTERISTICS FOR DRAM IO................................................................................................. 6

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1 Introduction
1.1 Overview
The Q3 integrates advanced and power-efficient 32-bit CPU, which operates at speed up to 850MHz with FPU. The Q3 high-performance, low-power, multi-function processor is a highly integrated single-chip solution, embedded full-format HD video codec, graphic and image processor, and knockout peripheral interface, for variety applications. The highly integrated Q3 is target at many application fields such as Car DVR, IP Camera, etc. which can bring end-users better experiences of surfing, watching, gaming and reading. The Q3 has an integrated ISP, optimized algorithm for graphics processing before encoding, and includes many powerful hardware accelerators for tasks such as motion video processing, audio processing, display manipulation and scaling. An integrated Full Format Codec (FFC) supports encoding of JPEG/H.265/H.264 and decoding of JPEG/H.265/H.264/H.263/ DIVX/ON2 VP/MPEG-1/Spark/MPEG-4/VC-1/WMV9/MPEG-2/Realvideo/SVC. The Q3 has an optimized interface to external memory. This optimized interface to external memory is capable of sustaining the high memory bandwidths required in high-end communication services. The DRAM port can be configured to support DDR3, DDR2, LPDDR2 and LPDDR with 16-bit bus width. The Q3 also supports eMMC Flash and etc. To reduce total system cost and enhance overall functionality, the Q3 includes many hardware peripherals such as Camera Interface, TFT 24-bit true color LCD controller, HDMI-TX, System Manager, 3-channel UART/IrDA, 6-channel DMA, 5-channel Timers with 5 PWM output, General Purpose I/O Ports, I2S/PCM-Bus audio interface, 1-channel SSP interface, 5-channel I2C-BUS interface, USB 2.0 Host & OTG, SD/SDHC/SDIO/eMMC Host Controller, 3-chs ADC and PLLs for clock generation.

1.2 Features
1.2.1
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CPU

Advanced and power-efficient 32-bit CPU CPU operates at speed up to 850MHz without DVFS Integrated 16KB L1 Instruction cache, 16KB L1 Data cache 128KB L2 unified cache An SCU responsible for maintaining coherency among L1 data caches Enhanced instructions targeted at audio, video, image, and speech processing High performance floating point unit

1.2.2
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Memory System

128KB ROM for system boot DRAM Memory Port ? LPDDR2/ LPDDR Interface ? 16-bit bus width ? DDR3/LVDDR3/DDR2 Interface ? 16-bit bus width ? One Ranks, up to 1GB(address space)

1.2.3
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Boot & Download System

128KB ROM for system boot 200KB internal RAM, including 192KB iRAM shared with Video Codec and 8KB independent iRAM Supports multi system boot source devices ? SPI Flash ? SD/eMMC Interface ? USB Host

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Supports system code download from SD/eMMC device, USB Host and USB OTG

1.2.4
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Multimedia Acceleration

Full-Format Codec (FFC) ? 1080p Multi Format Encoder ? 1080p H.265 Encoder ? Supports ITU-T H.265 (04/2013) ? Main Profile, Level 5, High Tier ? Main Still Profile ? Input format ? YCbCr 4:2:0 planar (YV12) ? YCbCr 4:2:0 semi-planar (NV12) ? YCbCr 4:2:0 semi-planar (NV21) ? YCbYCr 4:2:2 interleaved (YUYV) ? CbYCrY 4:2:2 interleaved (UYVY) ? RGB444 and BGR444 ? RGB555 and BGR555 ? RGB565 and BGR565 ? RGB888 and BRG888 ? RGB101010 and BRG101010 ? Image Size from 130 x 130 to 1920 x 1088 (Full HD) ? Up to 1080p resolution@30fps ? 1080p H.264 Encoder ? Supports ITU-T H.264 ? Baseline Profile, levels 1 – 5.1 ? Main Profile, levels 1 – 5.1 ? High Profile, levels 1 – 5.1 ? Input format ? YCbCr 4:2:0 planar (YV12) ? YCbCr 4:2:0 semi-planar (NV12) ? YCbCr 4:2:0 semi-planar (NV21) ? YCbYCr 4:2:2 interleaved (YUYV) ? CbYCrY 4:2:2 interleaved (UYVY) ? RGB444 and BGR444 ? RGB555 and BGR555 ? RGB565 and BGR565 ? RGB888 and BRG888 ? RGB101010 and BRG101010 ? Image Size from 144 x 96 to 1920 x 1088 (Full HD) ? Up to 1080p resolution@30fps ? 64M pixels JPEG Encoder ? Input format ? YCbCr 4:2:0 planar (YV12) ? YCbCr 4:2:0 semi-planar (NV12) ? YCbCr 4:2:0 semi-planar (NV21) ? YCbYCr 4:2:2 interleaved (YUYV) ? CbYCrY 4:2:2 Interleaved (UYVY) ? RGB444 and BGR444 ? RGB555 and BGR555 ? RGB565 and BGR565 ? RGB888 and BRG888 ? RGB101010 and BRG101010 ? Image Size from 96 x 32 to 8192 x 8192 (64 million pixels) ? Up to 90 million pixels per second

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1080p H.265 Decoder ? Supports ITU-T H.265 (04/2013) ? Main Profile, levels 1 – 5.1, High Tier ? Up to 1080p resolution@30fps 1080p Multi Format Decoder ? 64M pixels JPEG Decoder ? H.263 Profile 0, Levels 10-70, up to D1 resolution ? MPEG-1 / Spark / MPEG-4 / H.264 / VC-1 / WMV9 / MPEG-2 / SVC up to 1080p resolution @30fps ? DIVx3/4/5/6 up to 1080p resolution@30fps ? RV8/RV9/RV10 up to 1080p resolution@30fps ? VP6/VP8 up to 1080p resolution@30fps ? Integrated Post processor ? Standalone mode and Decoder Combined mode ? Image rotation ? Picture in picture ? Image cropping / digital zoom ? Dithering

1.2.5
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ISP (Image Signal Processing) Subsystem

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One Parallel Interface ? Supports ITU-R BT 656 Interface ? Supports 8-bit YCbCr input ? Supports ITU-R BT 601 Interface ? Supports 8-bit YCbCr input ? Supports 12-bit RAW RGB input ? Supports storing data in memory directly through the master interface when using YCbCr input One MIPI CSI Interface ? Supports 4-lane ? Up to 4.0 Gbps Supports Black Level Correction Supports Lens Shading Supports 2-D Denoise and independent 3-D Denoise Supports Defective Pixel Fixing Supports Lateral Chromatic Aberration Correction Supports AE, AF and AWB Supports Flicker Detection Supports Image Enhancer Supports Scaling Supports one parallel interface and one mipi csi interface simulationously Supports one encoder output and one display output simulationously Maximum resolution of one context for video recording is up to 1080p@30fps Supports indepent Face/Object Detection Supports indepent Lens Distortion Correction Supports indepent two-layers Overlay

1.2.6
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Display Subsystem

One Display Controller ? Supports Dithering ? Supports 2 layers overlay ? Supports RGB 24bit TFT interface, up to 1080p@30fps ? Supports integrated HDMI 1.4a HD interface, up to 1080p@30fps ? Supports I80 interface

1.2.7
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Security Subsystem

Supports DES, 3DES and AES
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Supports MD5 and SHA Supports RSA

1.2.8
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Connectivity

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10M/100M Ethernet MAC ? IEEE 802.3-2002 Standard compatible ? Supports both full-duplex and half-duplex operation ? Adaptive to 10/100 Mbps ? RMII PHY Interface compatible Three-way SD/SDHC /SDIO/eMMC Interface ? SD Standard Host Specification (Ver3.0) compatible ? SD Memory Card Specification (Ver3.0) compatible ? SDIO Card Specification (Ver3.0) compatible ? eMMC Specification (Ver4.41) compatible One-Way USB OTG ? Multi-used with one port of Host ? Compatible with Universal Serial Bus Specification Revision 2.0 ? Compatible with Universal Host Controller Interface (UHCI) Design Guide Revision 1.1 ? Compatible with On-The-Go Supplement to the USB 2.0 Specification Revision 1.0a One-Way USB Host 2.0 Interface ? Compatible with Enhanced Host Controller Interface Specification for Universal Serial Bus (Revision 1.0, March 12, 2002) ? Compatible with OpenHCI: Open Host Controller Interface Specification for USB (Release 1.0a, September 14, 1999) Audio Interface ? Supports PCM/I2S Audio Interface ? Including one-way PCM Interface and one-way I2S Interface Five-Way I2C-BUS Interface ? Five-way Independent I2C Interface ? Supports 100Kbps/400Kbps/3.4Mbps ? Support 7bit and 10bit Address mode ? Supports bulk transfer One-Way SSP Interface ? Supports master/slave mode ? Programmable choice of interface operation, SPI, Microwire, or TI synchronous serial Three-Way UART Interface ? Three-way Independent UART Interface ? Including two-way 4-line UART Interface and one-way 2-line UART Interface ? Compatible with IRDA1.0 Standard and RS232 ? Supports 3Mbps Touch Screen Interface ? 10bit 1Mbps ADC ? Supports 4/5/7/8 line Resistive Touch Screen. When only 4 lines are used, the rest 4 can be used as ordinary ADC input. 3-ch SAR ADC

1.2.9
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GPIO

Supports Numerous Flexibly configurable GPIOs Some GPIOs can be configured as external interrupt

1.2.10 System Peripherals
? 8 channel DMA Controller ? 8-channel DMA ? Supports instruction set mechanism that provides flexibility for programming DMA transfers

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Watchdog Timer ? Supports system reset at time-out ? Supports stopping at debug mode PWM Timer ? Five PWM Timers ? All of the Timers supports PWM output ? The first Timer supports Dead-zone signal output Timer ? Two 32bit Timers RTC (Real Time Clock) ? Supports Multi-power domain and LP mode PLL ? Supports 4 PLLs ? PLL Frequency is up to 2GHz ? Supports Numerous Clock Divider TFBGA 15x15mm, 446 pins, 0.65mm pitch

1.2.11 Package
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1.3 Block Diagram

Figure 1- 1: Q3 Block Diagram

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2 Package Information
2.1 Dimension

Figure 2- 1: Q3 TFBGA446 Package Dimension

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2.2 Ball Map

Figure 2- 2: Q3 TFBGA446 Ball Mapping Diagram (Left-Top)

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Figure 2- 3: Q3 TFBGA446 Ball Mapping Diagram (Right-Top)

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Figure 2- 4: Q3 TFBGA446 Ball Mapping Diagram (Left-Bottom)

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Figure 2- 5: Q3 TFBGA446 Ball Mapping Diagram (Right-Bottom)

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2.3 Pin Number Order
Table 2- 1: Q3 Pin Number Order Information Ball# A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 Pin Name UART1_TXD PCM0_FSYNC PCM0_SOUT # N/A I2C_SDA0 # N/A PHY_TXD_O0 # N/A I2C_SDA4 # N/A CAM_OCLK # N/A XMIPI1_DN3 # N/A XMIPI1_CLKN # N/A XMIPI1_DN0 # N/A XADC_VREF # N/A XUPHY2_DP0 XUPHY2_DM0 UART1_RXD UART1_RTS PCM0_SIN PCM0_CDCLK I2C_SCL0 I2C_SCL2 PHY_RXDV_I PHY_TXEN_O I2C_SCL4 CAM_VSYNC CAM_DATA7 CAM_DATA5 XMIPI1_DP3 XMIPI1_DN2 XMIPI1_CLKP XMIPI1_DN1 XMIPI1_DP0 XADC_WIPER XADC_XNUR XADC_YNLR XUPHY2_VBUS0 XUPHY2_TXRTUNE Ball# C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 Pin Name # N/A SSP0_CSN UART1_CTS PCM0_SCLK I2C_SDA1 I2C_SDA2 PHY_RXD_I0 PHY_MDC_O XJCTMS CAM_RESET CAM_HREF CAM_DATA6 XMIPI1_REXT XMIPI1_DP2 SD0_CMD XMIPI1_DP1 GND XADC_XPUL XADC_YPLL XUPHY2_ID0 XADC_INAUX2 # N/A SSP0_CLK SSP0_TXD SSP0_RXD PWM_TOUT0 I2C_SCL1 PHY_RXD_I1 PHY_CLK_RX_I PHY_MDIO XJCTDI CAM_DATA9 CAM_DATA10 CAM_DATA3 CAM_DATA2 IIS0_SDI0 SD0_DATA7 SD0_DATA2 SD0_DATA5 SD0_CLK XADC_SENS2 XADC_INAUX0 XADC_SENS1 XADC_INAUX1

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Ball# E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 E21 E22 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22

Pin Name # N/A GND OTG_DRVVBUS PWM_TOUT1 GPIO_4 PHY_TXD_O1 PWM_TOUT4 PWM_TOUT2 CAM_DATA11 CAM_PCLK CAM_DATA8 CAM_DATA1 IIS0_SDO0 IIS0_LRCK SD0_RESET_N SD0_DATA4 SD0_DATA0 SD0_DATA6 XADC_SENS3 RGB0_VSYNC XADC_SENS0 # N/A XMEM_DQSP0 XMEM_DQSN0 XMEM_DM0 XMEM_DQ2 XMEM_DQ6 DDR3_VREF GPIO_3 PWM_TOUT3 XJCTDO XJCTCK CAM_DATA4 CAM_DATA0 VDDIO28_CAM IIS0_SCLK VDDIO33_BTSD GPIO_2 SD0_DATA1 SD0_DATA3 RGB0_DEN RGB0_HSYNC RGB0_DATA7 RGB0_DATA6

Ball# G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22

Pin Name # N/A XMEM_DQ7 XMEM_DQ1 XMEM_DQ4 XMEM_DQ0 GND GND GND GND GND VDDIO33_COND VDDIO33_COND GND GND VDDIO33_BTSD IIS0_CDCLK RGB0_DATA22 RGB0_DATA21 RGB0_DATA5 RGB0_DATA3 RGB0_DATA4 # N/A XMEM_DQ5 XMEM_DQ3 XMEM_DQ15 XMEM_DQ9 XMEM_DQ11 GND GND GND GND GND GND GND XPLL_AHVDD XMIPI_AVDD ADC_AVDD ADC_AGND RGB0_DATA19 RGB0_DATA18 RGB0_DATA17 RGB0_DATA0 RGB0_DATA2 RGB0_DATA1

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Ball# J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 K21 K22

Pin Name # N/A XMEM_DQSP1 XMEM_DQSN1 XMEM_DM1 XMEM_DQ13 DDR3_VREF GND GND GND GND GND GND OTG_AGND XHDMI_VPH USB_VCC25 XMIPI_AGND RGB0_DATA20 RGB0_DATA16 RGB0_CLK RGB0_DATA14 RGB0_DATA15 # N/A XMEM_DQ10 XMEM_DQ14 XMEM_DQ12 XMEM_DQ8 GND GND XMEM_SREN GND GND GND GND GND GND GND GND GND GND XPLL_DVDD VDDC_USB RGB0_DATA11 RGB0_DATA13 RGB0_DATA12

Ball# L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 M1 M2 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22

Pin Name # N/A XMEM_ODT0 XMEM_CSN0 XMEM_BA0 VDD_DDR3 VDD_DDR3 GND GND core GND GND GND GND GND XPLL_DVSS core core core core RGB0_DATA9 RGB0_DATA10 # N/A XMEM_BA2 XMEM_A7 XMEM_A9 XMEM_WEN XMEM_ODT1 VDD_DDR3 GND GND core GND GND GND GND GND XPLL_AHVSS core core core core XXTI RGB0_DATA8 RGB0_DATA23

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Ball# N1 N2 N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 N15 N16 N17 N18 N19 N20 N21 N22 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22

Pin Name # N/A XMEM_CLKN0 XMEM_CLKP0 XMEM_A0 XMEM_A3 VDD_DDR3 VDD_DDR3 GND GND GND GND GND GND GND GND GND GND core XHDMI_VP GND XXTO # N/A XMEM_RSTN XMEM_A13 XMEM_A5 XMEM_A2 XMEM_A14 VDD_DDR3 GND GND GND GND GND GND GND VDDIO_XTAL VDDIO33_USB GND HDMI_CEC XEXTCLK XHDMI_HPD XHDMI_SDA XHDMI_SCL XHDMI_REXT

Ball# R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22

Pin Name # N/A XMEM_A12 XMEM_A6 XMEM_RASN XMEM_CASN VDDQ_CKE GND GND GND GND GND GND GND VDDIO33_DISP VDDIO33_DISP X32K_AVSS SYS_OCLK0 X32K_AVDD RTC_AVDD11 XHDMI_DATAN[2] XHDMI_DATAP[2] # N/A XMEM_A4 XMEM_A10 XMEM_A15 XMEM_A1 XMEM_A8 VDD_DDR3 VDD_DDR3 GND GND GND GND GND GND UART3_TXD GND GND XTESTMODE XNRESET XPWRONSLP XHDMI_DDCCEC XHDMI_DATAN[1] XHDMI_DATAP[1]

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Ball# U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 U18 U19 U20 U21 U22 V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V20 V21 V22

Pin Name # N/A XMEM_BA1 XMEM_CKE0 XMEM_A11 NC VDD_DDR3 OTG_ID COLOR_LED0 AUTO_FOCUS_1 AUTO_FOCUS_GP6 WIFI_POWER GPIO_1 GND SD2_DATA3 UART0_CTS GND XPWRON XPWRKEY RTC_AVDD33 XHDMI_DATAN[0] XHDMI_DATAP[0] # N/A NC NC NC NC NC XMEM_ZQ IR_INTERRUPT AUTO_FOCUS_GP0 LCD_EN LCD_BL_EN GPIO_5 SENSOR_POWER SD1_DATA3 SD2_DATA0 UART0_RXD UART0_TXD XRTCGP4/PWRMODE XPWRIND/XRTCGP3 XRTCGP5 HDMI_GND XHDMI_CLKN XHDMI_CLKP

Ball# W1 W2 W3 W4 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22

Pin Name # N/A NC NC NC NC I2C_SDA3 LIGHT_LED0 AUTO_FOCUS_GP3 AUTO_FOCUS_0 LCD_AVDD_EN AUDIO_AMP_EN GPIO_0 SD1_CD SD2_DATA1 SD2_CLK XADEC_AGNDHS XRTCGP0 XRTCGP1 XRTC_GP2 XRTCXO XRTCXI # N/A NC NC NC NC NC I2C_SCL3 XOM1 COLOR_LED1 LIGHT_LED1 AUTO_FOCUS_GP1 AUTO_FOCUS_GP5 AUTO_FOCUS_GP4 SD1_DATA0 SD1_CMD SD2_CMD UART0_RTS XADEC_AGNDREF XADEC_AVDD XADEC_AVDDHS XADEC_AGND XADEC_MICLP XADEC_MICLN

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Ball# AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8 AA9 AA10 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22

Pin Name # N/A NC NC NC NC CHAR_GER_FULL XOM0 GYROSCOPE_INTERRUPT COLOR_LED2 JACK_DET AUTO_FOCUS_3 AUTO_FOCUS_GP2 SD1_DATA2 SD1_CLK SD2_DATA2 UART3_RXD XADEC_MICBIAS XADEC_HSOUTL XADEC_VREFDAC XADEC_LINER1P XADEC_LINER1N # N/A

Ball# AB1 AB2 AB3 AB4 AB5 AB6 AB7 AB8 AB9 AB10 AB11 AB12 AB13 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22

Pin Name NC NC # N/A NC # N/A GND # N/A G-SENSOR_INTERRUPT # N/A WIFI_RESET # N/A AUTO_FOCUS_2 # N/A SD1_DATA1 # N/A XADEC_VCM # N/A XADEC_HSOUTR # N/A XADEC_VREFADC XADEC_LINEOUTLP XADEC_LINEOUTLN

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2.4 Q3 Power/Ground IO Descriptions
Table 2- 2: Q3 Power/Ground IO Information Pin Name Ball# GND C17,E2,G6,G7,G8,G9,G10,G13,G14,H6,H7,H8,H9,H10,H11,H12,J7, J8,J9,J10,J11,J12,K5,K6,K8,K9,K10,K11,K12,K13,K14,K15,K16, K17,L7,L8,L10,L11,L12,L13,L14,M7,M8,M10,M11,M12,M13,M14, N8,N9,N10,N11,N12,N13,N14,N15,N16,N17,N20,P7,P8,P9,P10,P11, P12,P13,P16,R7,R8,R9,R10,R11,R12,R13,T8,T9,T10,T11,T12,T13, T15,T16,U13,U16,AB6 L15 M15 R16 H16 V20 J13 J16 Y20 W16 DRAM Port VDD_DDR3 VDDQ_CKE CORE L5,L6,M6,N6,N7,P6,R6,T6,T7,U6 R6 Core Power L9,L16,L17,L18.L19,M9,M16,M17,M18,M19,N18 PLL Power K18 H13 ADC Power H15 RTC Domain Power U19 R19 R18 USB Power P15 J15 K19 AudioCodec Power Y19 Y18 HDMI Power N19 J14 MIPI Power H14 DDR3/DDR2/LPDDR2/mDDR Power DDR3/DDR2/LPDDR2/mDDR CKE island Power Core 1.1V Power Description

GND

Core Ground and digital IO Ground

XPLL_DVSS XPLL_AHVSS X32K_AVSS ADC_AGND HDMI_GND OTG_AGND XMIPI_AGND XADEC_AGND XADEC_AGNDHS

PLL digital Ground PLL analog Ground 32KHz crystal analog Ground ADC analog Ground HDMI analog Ground USB analog Ground MIPI analog Ground Audio Codec analog groud Audio Codec analog Ground for headset drivers

XPLL_DVDD XPLL_AHVDD ADC_AVDD

PLL 1.1V digital Power PLL 2.5V analog Power ADC 2.5V analog Power

RTC_AVDD33 RTC_AVDD11 X32K_AVDD VDDIO33_USB USB_VCC25 VDDC_USB XADEC_AVDDHS XADEC_AVDD XHDMI_VP XHDMI_VPH

RTC IO 3.3V analog Power RTC Core 1.1V analog Power 32KHz analog Power USB 3.3V Power USB 2.5V Power USB 1.1V Power AudioCodec 3.3V analog Power for headset drivers AudioCodec 3.3V analog Power HDMI 1.1V analog Power HDMI 2.5V analog Power

XMIPI_AVDD

MIPI 2.5V analog Power

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Pin Name VDDIO33_COND VDDIO33_DISP VDDIO33_BTSD VDDIO28_CAMD VDDIO_XTAL

Ball# IO Power G11,G12 R14,R15 F15,G15 F13 P14

Description IO Power for connectivity and audio interface IO Power for LCD interface IO Power for iNAND interface IO Power for Camera interface IO Power for XXTI/XXTO

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2.5 Q3 Function IO Descriptions
Table 2- 3: Q3 IO Decriptions Pin Name SD0_DATA0 SD0_DATA1 SD0_DATA2 SD0_DATA3 SD0_DATA4 SD0_DATA5 SD0_DATA6 SD0_DATA7 SD0_CLK SD0_CMD SD0_RESET_N GPIO_2 IIS0_CDCLK IIS0_SCLK IIS0_LRCK IIS0_SDI0 IIS0_SDO0 RGB0_DEN RGB0_VSYNC RGB0_HSYNC RGB0_DATA0 RGB0_DATA1 RGB0_DATA2 RGB0_DATA3 RGB0_DATA4 RGB0_DATA5 RGB0_DATA6 RGB0_DATA7 RGB0_DATA8 RGB0_DATA9 RGB0_DATA10 RGB0_DATA11 RGB0_DATA12 Ball # E17 F17 D16 F18 E16 D17 E18 D15 D18 C15 E15 F16 G16 F14 E14 D14 E13 F19 E20 F20 H20 H22 H21 G20 G21 G19 F22 F21 M21 L20 L21 K20 K22 GPIO Mode GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 GPIO Interrupt NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO Pad type SD0, IIS0 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O LCD RGB I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Pull up/down PU PU PU PU PU PU PU PU PU PU PU PU PU PU PU PU PU PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD ResetState I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO Power supply

VDDIO33_BTSD

VDDIO33_DISP

14

RGB0_DATA13 RGB0_DATA14 Pin Name RGB0_DATA15 RGB0_DATA16 RGB0_DATA17 RGB0_DATA18 RGB0_DATA19 RGB0_DATA20 RGB0_DATA21 RGB0_DATA22 RGB0_DATA23 RGB0_CLK CAM_DATA0 CAM_DATA1 CAM_DATA2 CAM_DATA3 CAM_DATA4 CAM_DATA5 CAM_DATA6 CAM_DATA7 CAM_DATA8 CAM_DATA9 CAM_DATA10 CAM_DATA11 CAM_OCLK CAM_PCLK CAM_HREF CAM_VSYNC CAM_RESET I2C_SCL4 I2C_SDA4
SD1_DATA0/XJCTDO SD1_DATA1/XJCTDI SD1_DATA2/XJCTMS SD1_DATA3/XJCTCK SD1_CLK/UART3_TXD SD1_CMD/UART3_RXD

K21 J20 Ball # J21 J18 H19 H18 H17 J17 G18 G17 M22 J19 F12 E12 D13 D12 F11 B12 C12 B11 E11 D10 D11 E9 A11 E10 C11 B10 C10 B9 A9 Y13 AB14 AA13 V13 AA14 Y14 W13

GPIO33 GPIO34 GPIO Mode GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO128 GPIO129 GPIO62 GPIO63 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68

NO NO GPIO Interrupt NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO YES YES YES YES YES YES YES YES YES

I/O I/O Pad type LCD RGB I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Camera I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

PD PD Pull up/down PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PD PU PU PD PD PD PD PD PD PD PU PU PU PU PU PU PU PU PU

I/GPIO I/GPIO ResetState I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO #1 I/GPIO #1 I/GPIO #1 I/GPIO #1 I/GPIO #1 I/GPIO #1 I/GPIO

Power supply

VDDIO33_DISP

VDDIO28_CAMD

VDDIO33_COND

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SD2_DATA0 SD2_DATA1 SD2_DATA2 SD2_DATA3 Pin Name SD2_CLK SD2_CMD I2C_SCL0 I2C_SDA0 I2C_SCL1 I2C_SDA1 UART0_CTS UART0_RTS UART0_TXD UART0_RXD UART3_TXD UART3_RXD PWM_TOUT0 PWM_TOUT1 PCM0_CDCLK PCM0_SCLK PCM0_SOUT PCM0_SIN PCM0_FSYNC SSP0_RXD SSP0_TXD SSP0_CLK SSP0_CSN OTG_DRVVBUS UART1_CTS UART1_RTS UART1_TXD UART1_RXD XJCTCK XJCTMS XJCDI XJCTDO HDMI_SCL HDMI_SDA HDMI_CEC PWM_TOUT4 Confidential

V14 W14 AA15 U14 Ball # W15 Y15 B5 A5 D5 C5 U15 Y16 V16 V15 T14 AA16 D4 E4 B4 C4 A3 B3 A2 D3 D2 D1 C2 E3 C3 B2 A1 B1 F10 C9 D9 F9 P21 P20 P17 E7

GPIO69 GPIO70 GPIO71 GPIO72 GPIO Mode GPIO73 GPIO74 GPIO75 GPIO76 GPIO77 GPIO78 GPIO79 GPIO80 GPIO81 GPIO82 GPIO83 GPIO84 GPIO85 GPIO86 GPIO87 GPIO88 GPIO89 GPIO90 GPIO91 GPIO92 GPIO93 GPIO94 GPIO95 GPIO96 GPIO97 GPIO98 GPIO99 GPIO100 GPIO101 GPIO102 GPIO103 GPIO104 GPIO107 GPIO108 GPIO109 GPIO110

YES YES YES YES GPIO Interrupt YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES

I/O I/O I/O I/O Pad type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

PU PU PU PU Pull up/down PU PU PU PU PU PU PU PU PU PU PU PU PD PD PD PD PD PD PD PU PU PU PU PD PU PU PU PU PU PU PU PU PU PU PU PU

I/GPIO I/GPIO I/GPIO I/GPIO ResetState I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO

Power supply

VDDIO33_COND

16

XEXTCLK SYS_OCLK0 PWM_TOUT2 PWM_TOUT3 PHY_CLK_RX_I

P18 R17 E8 F8 D7

GPIO111 GPIO112 GPIO113 GPIO114 GPIO115

YES YES YES YES YES

I/O I/O I/O I/O I/O

PU PD PD PD PD

I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO

Pin Name PHY_MDC_O PHY_MDIO PHY_TXEN_O PHY_TXD_O0 PHY_TXD_O1 PHY_RXDV_I PHY_RXD_I0 PHY_RXD_I1 I2C_SCL2 I2C_SDA2 GPIO_3 GPIO_4
CHARGER_FULL

Ball # C8 D8 B8 A7 E6 B7 C7 D6 B6 C6 F7 E5 AA6 AA7 Y7 U7 AB8 AA8 V7 AB10 AA10 U8 V8 AA9 W7 Y9 W9 U9 AB12 AA11 V8 Y10 AA12

GPIO Mode GPIO116 GPIO117 GPIO118 GPIO119 GPIO120 GPIO121 GPIO122 GPIO123 GPIO124 GPIO125 GPIO126 GPIO127 GPIO130 GPIO131 GPIO132 GPIO138 GPIO139 GPIO140 GPIO141 GPIO142 GPIO143 GPIO144 GPIO145 GPIO146 GPIO147 GPIO148 GPIO149 GPIO150 GPIO151 GPIO152 GPIO153 GPIO154 GPIO155

GPIO Interrupt YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES

Pad type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

Pull up/down PD PD PD PD PD PD PD PU PU PU PD PD PD PU PD PU PU PU PU PU PU PD PD PD PD PU PD PD PD PD PD PD PD

ResetState I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO

Power supply

XOM0 XOM1 OTG_ID
G-SENSOR_INTERRUPT GYROSCOPE_INTERRUPT

VDDIO33_COND

IR_INTERRUPT WIFI_RESET JACK_DET COLOR_LED0 COLOR_LED1 COLOR_LED2 LIGHT_LED0 LIGHT_LED1
AUTO_FOCUS_0 AUTO_FOCUS_1 AUTO_FOCUS_2 AUTO_FOCUS_3 AUTO_FOCUS_GP0 AUTO_FOCUS_GP1 AUTO_FOCUS_GP2

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AUTO_FOCUS_GP3 AUTO_FOCUS_GP4 AUTO_FOCUS_GP5 AUTO_FOCUS_GP6 AUDIO_AMP_EN

LCD_EN LCD_AVDD_EN

W8 Y12 Y11 U10 W11 V9 W10

GPIO156 GPIO157 GPIO158 GPIO159 GPIO160 GPIO161 GPIO162

YES YES YES YES YES YES YES

I/O I/O I/O I/O I/O I/O I/O

PD PD PD PD PD PU PD

I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO

Pin Name LCD_BL_EN
SENSOR_POWER

Ball # V10 V12 U11 V11 W12 U12

GPIO Mode GPIO163 GPIO164 GPIO165 GPIO166 GPIO167 GPIO168

GPIO Interrupt YES YES YES YES YES YES

Pad type I/O I/O I/O I/O I/O I/O

Pull up/down PD PD PD PD PU PU

ResetState I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO I/GPIO

Power supply

WIFI_POWER GPIO_5 GPIO_0 GPIO_1

VDDIO33_COND

Pin Name XXTI XXTO XNRESET XTESTMODE XRTCGP0 XRTCGP1 XRTCGP2 XRTCGP4 XRTCGP5 XPWRON XPWRONSLP XPWRKEY XPWRIND XRTCXI XRTCXO

Ball # M20 N21 T18 T17 W17 W18 W19 V17 V19 U17 T19 U18 V18 W21 W20

Func0 Crystal_XI Crystal_XO RESET TESTMODE RTCGP0 RTCGP1 RTCGP2 XPWRMODE RTCGP5 PWRON PWRONSLP PWRKEY PWRIND RTC_XI RTC_XO

Pad type System Crystal I O RTC Domain I I I/O I/O I/O XRTCGP4 I/O I/O O O I XRTCGP3 I/O I O

Func1

Pull up/down # N/A # N/A # N/A PD PD PD PD PD PD PD PD PD PD # N/A # N/A

ResetState # N/A # N/A I I/PD I/PD I/PD I/PD I/PD I/PD I/PD I/PD I/PD #2 I/PD # N/A # N/A

Power supply VDDIO_XTAL

RTC Power Domain

Note #1: These pads have two different functions which are controlled by the input value of the pad SD1_CD. When SD1_CD = 0, these pads act as functions before slash; when SD1_CD = 1, these pads act as functions after slash. Note #2: when XRTCGP4/XPWRMODE = 1, Pulldown is disabled. Confidential 18

Pin Name XMEM_CKE0 XMEM_RSTN XMEM_SREN XMEM_CLKP0 XMEM_CLKN0 XMEM_WEN XMEM_RASN XMEM_CASN XMEM_BA0 XMEM_BA1 XMEM_BA2 XMEM_CSN0 XMEM_ODT0 XMEM_ODT1 XMEM_A0 XMEM_A1 XMEM_A2 XMEM_A3 XMEM_A4 XMEM_A5 XMEM_A6 XMEM_A7 XMEM_A8 XMEM_A9 XMEM_A10 XMEM_A11 XMEM_A12 XMEM_A13 XMEM_A14 XMEM_A15 XMEM_ZQ DDR3_VREF

Ball # U3 P1 K7 N3 N2 M4 R4 R5 L4 U2 M1 L3 L2 M5 N4 T4 P4 N5 T1 P3 R3 M2 T5 M3 T2 U4 R2 P2 P5 T3 V6 F6,J6

Pad Type Pull Up/down DRAM CKE Island O NA O NA I NA DRAM Control O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA O NA P NA

ResetState O O I O O O O O O O O O O O O O O O O O O O O O O O O O O O O I

Power Supply

VDDQ_CKE

VDD_DDR3

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Pin Name XMEM_DQSP0 XMEM_DQSN0 XMEM_DM0 XMEM_DQ0 XMEM_DQ1 XMEM_DQ2 XMEM_DQ3 XMEM_DQ4 XMEM_DQ5 XMEM_DQ6 XMEM_DQ7 XMEM_DQSP1 XMEM_DQSN1 XMEM_DM1 XMEM_DQ8 XMEM_DQ9 XMEM_DQ10 XMEM_DQ11 XMEM_DQ12 XMEM_DQ13 XMEM_DQ14 XMEM_DQ15

Ball # F1 F2 F3 G5 G3 F4 H2 G4 H1 F5 G2 J2 J3 J4 K4 H4 K1 H5 K3 J5 K2 H3

Pad type Pull up/down DRAM DATA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA I/O NA

ResetState I I I I I I I I I I I I I I I I I I I I I I

Power supply

VDD_DDR3

Pin Name NC NC NC NC XUPHY2_ID0 XUPHY2_DP0 XUPHY2_DM0 XUPHY2_VBUS0 XUPHY2_TXRTUNE Confidential

Ball # Y5 AA2 AA4 Y2 C20 A21 A22 B21 B22

Pad type Pull up/down DRAM DATA NA NA NA NA NA NA NA NA USB OTG A NA A NA A NA A NA A NA ADC

ResetState I I I I I NA NA NA NA

Power supply

VDD_DDR3

USB Power Domain

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XADC_INAUX0 XADC_INAUX1 XADC_INAUX2 XADC_SENS0 XADC_SENS1 XADC_SENS2 XADC_SENS3 XADC_YNLR XADC_YPLL XADC_XNUR XADC_XPUL XADC_WIPER XADC_VREF XADEC_VCM XADEC_VREFADC XADEC_VREFDAC XADEC_LINER1N XADEC_LINER1P XADEC_MICLN XADEC_MICLP XADEC_HSOUTL XADEC_HSOUTR XADEC_LINEOUTLN XADEC_LINEOUTLP XADEC_MICBIAS

D20 D22 C21 E21 D21 D19 E19 B20 C19 B19 C18 B18 A19 AB16 AA19 AB20 AA21 AA20 Y22 Y21 AA18 AB18 AB22 AB21 AA17

A A A A A A A A A A A A A Audio Codec A A A A A A A A A A A A

NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA NA

I I I I I I I I I I I I I O O O I I I I O O O O I

ADC Power Domain

Audio Codec Power Domain

Pin Name XHDMI_CLKP XHDMI_CLKN XHDMI_DP0 XHDMI_DN0 XHDMI_DP1 XHDMI_DN1 XHDMI_DP2 XHDMI_DN2 XHDMI_REXT XHDMI_DDCCEC Confidential

Ball # V22 V21 U21 U20 T22 T21 R21 R20 P22 T20

Pad type Pull up/down HDMI A NA A NA A NA A NA A NA A NA A NA A NA A NA A NA

ResetState O O O O O O O O NA NA

Power supply

HDMI Power Domain

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XHDMI_HPD XMIPI1_CLKP XMIPI1_CLKN XMIPI1_DP0 XMIPI1_DN0 XMIPI1_DP1 XMIPI1_DN1 XMIPI1_DP2 XMIPI1_DN2 XMIPI1_DP3 XMIPI1_DN3 XMIPI1_REXT

P19 B15 A15 B17 A17 C16 B16 C14 B14 B13 A13 C13

I/O MIPI DSI/CSI A A A A A A A A A A A

NA NA NA NA NA NA NA NA NA NA NA NA

I O O O O O O O O O O NA

MIPI Power Domain

Notes: 1) Pad types: I=input, O=output, I/O=input/output(bidirectional) AP=Analog Power, AG=Analog Ground DP=Digital Power, DG=Digital Ground A=Analog 2) Output Drive Unit is mA, only Digital IO have drive value 3) Reset state: I= input without any pull resistor, O= output without any pull resistor 4) Power supply means that all the related IOs is in these IO power domain. If multiple powers is included, they are connected together in one IO power ring

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3 Electrical Specification
3.1 Power On Sequence

Figure 3- 1: Q3 Power On Sequence

1

3.2 Absolute Maximum Ratings
Table 3- 1: Q3 Absolute Maximum Ratings Parameters DC supply voltage for internal digital logic DC supply voltage for Digital part of PLL DC supply voltage for Analog part of PLL DC supply voltage for Analog part of HDMI Related Power Group core XPLL_DVDD XPLL_AHVDD XHDMI_VP, XHDMI_VPH VDDIO33_BTSD, VDDIO33_COND, VDDIO33_DISP, VDDIO_XTAL, VDDIO28_CAMD VDD_DDR3, VDDQ_CKE XADEC_AVDD, XADEC_AVDDHS VDDIO33_USB, VDDC_USB RTC_AVDD33 RTC_AVDD11, X32K_AVDD XMIPI_AVDD XUPHY2_VBUS0 Max 1.21 1.21 2.75 1.21 2.75 3.6 Unit V V V V

DC supply voltage for Digital IO

V

DC supply voltage for DDR IO DC supply voltage for Analog part of Audio Codec DC supply voltage for Analog part of USB DC supply voltage for RTC DC supply voltage for Analog part of MIPI Analog Input voltage for DP/DM/VBUS of USBOTG/Host2.0 Storage Temperature

1.95 3.6 3.6 2.75 3.6 1.21 2.75 5 150

V V V V V V ?C

Note: Absolute maximum ratings specify the values beyond which the device may be damaged permanently. Long-term exposure to absolute maximum ratings conditions may affect device reliability.

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3.3 Recommended Operating Conditions
Table 3- 2: Q3 Recommended Operating Conditions Parameters Digital Core Digital part of PLL Analog part ofPLL HDMI Symbol core XPLL_DVDD XPLL_AHVDD XHDMI_VP, XHDMI_VPH VDDIO33_BTSD, VDDIO33_COND, VDDIO33_DISP, VDDIO_XTAL, VDDIO28_CAM VDD_DDR3, VDDQ_CKE VDD_DDR3, VDDQ_CKE VDD_DDR3, VDDQ_CKE VDD_DDR3, VDDQ_CKE VDD_DDR3, VDDQ_CKE DDR3_VREF XADEC_AVDD, XADEC_AVDDHS VDDIO33_USB, VDDC_USB RTC_AVDD11, X32K_AVDD RTC_AVDD33 XMIPI_AVDD Min 0.99 0.99 2.25 0.99 2.25 1.62 3 1.425 1.14 1.65 1.7 1.28
0.49* VDD_DDR3

Typ 1.1 1.1 2.5 1.1 2.5 1.8 3.3 1.5 1.2 1.8 1.8 1.35
0.5* VDD_DDR3

Max 1.21 1.21 2.75 1.21 2.75 1.98 3.6 1.575 1.3 1.95 1.9 1.45
0.51* VDD_DDR3

Unit V V V V

Digital IO

V

DDR IO ( DDR3 ) DDR IO ( LPDDR2 ) DDR IO ( LPDDR ) DDR IO ( DDR2 ) DDR IO ( DDR3L ) DDR reference supply (VREF) Audio Codec USB RTC MIPI

V V V V V V V V V V

2.5 3 2.25 0.99 3 2.25

3.3 3.3 2.5 1.1 3.3 2.5

3.6 3.6 2.75 1.21 3.6 2.75

Note: Symbol name is same as the pin name in the io descriptions.

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3.4 DC Characteristics
Table 3- 3: Q3 DC Characteristics Parameters Input Low Voltage Input High Voltage Output Low Voltage Digital IO ( 3.3V ) Output High Voltage Pullup Resistor Pulldown Resistor Input Low Voltage Input High Voltage Output Low Voltage Digital IO ( 1.8V ) Output High Voltage Pullup Resistor Pulldown Resistor Input Low Voltage Input High Voltage DDR IO ( DDR3 ) Output Low Voltage Output High Voltage Input Low Voltage Input High Voltage DDR IO ( LPDDR2 ) Output Low Voltage Output High Voltage Input Low Voltage Input High Voltage DDR IO ( DDR2 ) Output Low Voltage Output High Voltage Input Low Voltage Input High Voltage DDR IO ( LPDDR ) Output Low Voltage Output High Voltage Symbol VIL VIH VOL VOH Rpu Rpd VIL VIH VOL VOH Rpu Rpd VIL VIH VOL VIL VIL VIH VOL VIL VIL VIH VOL VIL VIL VIH VOL VIL Min
-0.3 2 N/A 2.4 41 43 -0.3 1.17 N/A 1.35 79 73 -0.3 DDR3_VREF+0.1 N/A 0.8*VDD_DDR3 -0.3 DDR3_VREF+0.22 N/A 0.9*VDD_DDR3 -0.3 DDR3_VREF+0.125 N/A VDD_DDR3-0.28 -0.3 0.8*VDD_DDR3 N/A 0.9*VDD_DDR3 0 1.8 0 0.1*VDD_DDR3 N/A 0 0 1.2 0 0.1*VDD_DDR3 N/A DDR3_VREF-0.1 VDD_DDR3+0.3 0.28 N/A 0.2*VDD_DDR3 0 1.5 0 60 64 0 1.8 0 1.8 128 127 0 91 105 0.63 3.6 0.45 N/A 218 232 DDR3_VREF-0.1 VDD_DDR3 0.2*VDD_DDR3 N/A DDR3_VREF-0.22

Typ
0 3.3 0

Max
0.8 3.6 0.4

Unit
V V V V KΩ KΩ V V V V KΩ KΩ V V V V V V V V V V V V V V V V

3.5 Electrical Characteristics for Digital IO
Table 3- 4: Q3 Electrical Characteristics for Digital IO Parameters Input leakage current Tri-state leakage Digital current IO High level input ( 3.3V ) current Lowlevel input current Input leakage current Tri-state leakage Digital current IO High level input ( 1.8V ) current Lowlevel input current Symbol Ii Ioz Iih Iil Ii Ioz Iih Iil Test condition VI=3.3V or 0V VO=3.3V or 0V VI=3.3V VI=0V VI=3.3V or 0V VO=3.3V or 0V VI=3.3V VI=0V Min -10 -10 TBD TBD -10 -10 TBD TBD Typ Max 10 10 TBD TBD 10 10 TBD TBD Unit μA μA A A μA μA A A

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3.6 Electrical Characteristics for PLL
Table 3- 5: Q3 Electrical Characteristics for PLL Parameters Comparison Frequency Input Clock Frequency Output Clock Frequency VCO Operating Range Lock Time (at power-up/PD) Power Consumption Symbol FREF FIN FOUT FVCO TRDY FIN = 50MHz, FOUT = 2000MHz, AHVDD = 2.5V, DVDD = 1.1V, 25°C Test condition FREF = FIN / NR [1] FIN = NR * FREF FOUT = FVCO / NO [1] FVCO = FREF * NF [1] Min 10 10 125 1000 Typ ----Max 50 400 2000 2000 0.2 Unit MHz MHz MHz MHz ms mW

Note: [1] NR is the input divider value; NF is the feedback divider value; NO is the output divider value.

3.7 Electrical Characteristics for USB Host&OTG PHY
Table 3- 6: Q3 Electrical Characteristics for USB Host&OTG PHY Parameters HS Transmit, maximum transition density HS Transmit, minimum transition density HS Idle Symbol Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Current from VDDIO33_USB Current from USB_VCC25 Current from VDDC_USB Test Condition Min Typ 2.288 23.77 4.95 2.76 25.670 4.27 2.27 5.80 4.06 15.77 5.84 3.30 14.77 5.93 4.94 0.0002 0.0050 0.0681 0.0001 0.0054 0.0686 0.0001 0.0050 0.1227 0.0643 2.97 0.1228 Max Unit mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA

FS Transmit

LS Transmit

75? C

SIDDQ

Suspend

Sleep

Battery Charger

Confidential

5

3.8 Electrical Characteristics for DRAM IO
Table 3- 7: Q3 Electrical Characteristics for DRAM IO Parameters
VDD_DDR3 standby current, ODT OFF

Symbol

Test condition

Min

Typ 0.02 0.02 0.02 0.01 0.02 0.01 0.02 0.01 0.02

Max 14.47 5.06 13.48 4.80 17.31 6.26 15.03 6.45 12.31

Unit μA μA μA μA μA μA μA μA μA

DDR3

Input leakage current, SSTL mode, unterminated
VDD_DDR3 standby current, ODT OFF

DDR3L

Input leakage current, SSTL mode, unterminated
VDD_DDR3 standby current, ODT OFF

DDR2 LPDDR LPDDR2

Input leakage current, SSTL mode, unterminated
VDD_DDR3 quiescent current, ODT OFF

Input leakage current
VDD_DDR3 standby current, ODT OFF

Confidential

6


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